1. Field of the Invention
The present invention relates to semiconductor wafers, devices, and components. Particularly, the present invention relates to forming at least one conductive via in a semiconductor substrate including a plurality of conductive elements extending therethrough.
2. Background of Related Art
During the production of electronic devices such as printed circuit boards, semiconductor dice, multichip modules, and chip carriers, the signal carrying capability or density (i.e., the number of signals conducted therethrough) of a conductive via formed through the thickness of a substrate may be limited. A conventional manufacturing process involves drilling, etching or laser cutting a hole through a substrate followed by plating of the sidewall of the hole with a metal so as to provide a single conductive path therethrough.
Accordingly, several conventional approaches have been developed for increasing the signal carrying capability of a conductive via formed in a substrate.
For instance, U.S. Pat. No. 5,300,911 to Walters discloses a structure with coaxial conductive elements forming a conductive via, wherein the conductive elements are used to carry current from two or more coupled windings to form a monolithic transformer. In further detail, through-holes are formed in a fired ceramic ferrite and then are plated with metal. After that, a dielectric is coated over the metal and another layer of metal is plated thereon. Additional conductor layers may be applied to form a third or fourth coaxial conductive structure if needed.
U.S. Pat. No. 5,374,788 to Endoh et al. discloses a structure having a single through-hole that is used for top-to-bottom connection in a printed circuit board. The core metal and via holes in the circuit board are coated with coaxial metal or solder layers to improve adhesion. The layers comprising the coaxial coating are not electrically isolated from each other.
U.S. Pat. No. 5,541,567 to Fogel et al. discloses forming a coaxial conductive via by wire bonding wires to be used as center conductors to a conductive surface and then inserting the protruding wires into through-holes placed in a ceramic or magnetic material layer. This structure is designed to perform like a transformer or inductor. However, the alignment of thousands of pins through an array of thousands of holes may be a difficult process. Further, the finest pitch spacing between conductive vias may be limited.
Also, U.S. Pat. No. 5,619,791 to Lambrecht, Jr., U.S. Pat. No. 4,543,715 to Iadarola et al., U.S. Pat. No. 6,498,381 to Halahan et al., and U.S. Pat. No. 6,388,208 to Kiani et al. each disclose multiconductor via structures and methods for their manufacture.
From the above, it can be seen that a need exists for improved multiconductor via structures, semiconductor dice including same, and methods for producing the same.